A Built-in Self-Test System for External DRAM
DOI:
https://doi.org/10.51408/1963-0061Keywords:
Built-in Self-Test System, external DRAM memory, DRAM memory faults, System on ChipAbstract
In the fast-growing Integrated Circuits (IC) industry, memory is one of the few keys to have systems with improved and fast performance. Only one transistor and a capacitor are required for Dynamic Random-Access Memory (DRAM) bit. It is widely used for mass storage. Although the high-efficiency tests are performed to provide the reliability of the memories, maintaining acceptable yield and quality is still the most critical task. To perform a high-speed effective test of DRAM memories, a built-in self-test (BIST) mechanism is proposed.
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