Mathematical Models of Yield Prediction in Modern VLSI Design

Authors

  • V. Karapetyan Russian-Armenian University

Abstract

This paper consists of two parts. First the problem of yield in contemporary V LSI manufacturing process is presented. The second part covers the methodology of yield modeling and yield computation technique. The main focus in this paper is put on the random defect limited yield modeling.

References

] A lbert V .Ferris-Prabhu. "Introduction to Semiconductor Device Yield Modeling". Artech House Publishers, 1992.

Israel Koren. " Defect Tolerance in VLSI Circuits: Techniques and Yield Analisys" .Proceedings of the IEEE , Vol 86, No 9:181 7{1836, September, 1998.

Ch. Weber, V .Sankaran, K.W.Tobin, and G. Scher. " Quantifying the Value of Ownership of Yield Analysis Technologies" . IEEE Transactions on Semiconductor Manufacturing, Vol 15, No 4:411 {419, November, 1998.

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Published

2021-12-10

How to Cite

Karapetyan, V. . (2021). Mathematical Models of Yield Prediction in Modern VLSI Design. Mathematical Problems of Computer Science, 26, 64–71. Retrieved from http://mpcs.sci.am/index.php/mpcs/article/view/525