Efficient March-Like Algorithm for Detection of All Two-Operation Dynamic Faults from Subclass Sav
Abstract
This paper introduces an efficient March-like algorithm for detection of the well known class Sav of dynamic faults. Sav is the subclass of all two-operation dynamic functional fault models that are sensitized by means of applying two consecutive operations, one applied on the aggressor cell and the second operation applied on the victim cell. Earlier, only subclasses Saa and Svv were considered by a few authors when both
sensitizing operations were applied either on the aggressor or victim cell, and March
algorithms were developed by them. Subclasses Sav and Sva were not considered due
to their complexity. A larger class of March-like algorithms has to be considered for detection of those subclasses since March algorithms cannot detect them. It is shown that 392N operations are sufficient for detection of faults from Sav.
References
A.J. van de Goor, "Testing semiconductor memories: Theory and Practice", John Wiley and Sons, 1991.
S. Hamdioui, A.J. van de Goor, M. Rodgers, "March SS: a test for all static simple faults", Records of IEEE Int. Workshop MTDT, pp. 95-100, 2002.
S. Hamdioui, A.J. van de Goor, M. Rodgers, "Linked faults in random access memories: concept, fault models, test algorithms, and industrial results", IEEE Trans. CAD, vol. 23, No. 5, May pp. 737-756, 2004.
S. Hamdioui, Z. Al-Ars and A.J. van de Goor, "Testing static and dynamic faults in random access memories", In Proc. of IEEE VLSI Test Symposium, pp. 395-400, 2002.
R.D. Adams, E.S. Cooley, "Analysis of deceptive read destructive memory fault model and recommended testing", Proc. of IEEE North Atlantic Test Workshop, pp. 27-32, 1996.
S. Hamdioui, R. Wadsworth, J.D. Reyes, A.J. van de Goor, "Importance of dynamic faults for new SRAM technologies" In Proc. of IEEE European Test Workshop, pp. 29-34, 2003.
S. Hamdioui, G.N. Gaydadjiev, and A.J. van de Goor, "A fault primitive based analysis of dynamic memory faults", IEEE 14th Annual Workshop on Circuits, Systems and Signal Processing, Veldhoven, the Netherlands, pp. 84-89, 2003.
A. Benso, A. Bosio, S. Di Carlo, G. Di Natale, P. Prinetto, "March AB, March AB1: New March tests for unlinked dynamic memory faults", ITC, 2005.
A. Benso, A. Bosio, S. Di Carlo, G. Di Natale, P. Prinetto, "Automatic march test generation for static and dynamic faults, in SRAMs", Proc. ETS 2005, Tallinn, pp. 122-127, 2005.
G. Harutunyan, V.A. Vardanian, Y. Zorian, "Minimal march tests for dynamic faults in random access memories", Journal of Electronic Testing: Theory and Applications, vol. 23, Number 1, pp. 55-74, 2007.
G. Harutunyan, V.A. Vardanian, Y.Zorian, "Minimal march tests for dynamic faults in random access memories", In Proc. of IEEE European Test Symposium, pp. 43-48, 2006.
A.J. van de Goor, I. Schanstra, "Address and data scrambling: Causes and impact on memory tests", Proc. IEEE Workshop DELTA, pp. 128-136, 2002.
J.-F. Li, K.-L. Cheng, C.-T. Huang, and C.-W. Wu, "March based RAM diagnostic algorithms for stuck-at and coupling faults", Proc. IEEE ITC, pp. 758-767, 2001.
V.A. Vardanian, Y. Zorian, "A march-based fault location algorithm for static random access memories", Proc. IEEE Int.Workshop MTDT, pp. 62-67, 2002.
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