Compact High Performance Algorithm for Convolutional Decoder - Hakhoumian, Arsen; Zakaryan, Tigran; Muzhikyan, Aramazd; Nikoghosyan, Vahan (Mathematical Problems of Computer Science, 2021)
An efficient algorithm for convolutional decoder running in the mode of soft decision (1/2, K=7, 3-bit decision) in a FPGA Virtex-II is proposed. The results show that although increasing the length of the cutoff buffer improves the signal to noise ratio by 2dB, but it can significantly increase calculation time, which exponentially depends on the length of the cutoff buffer. At the optimal length of the cutoff buffer equal to 7, the obtained throughput is estimated up to 14Mbps.